Field Programmable Gate Array Applications—A Scientometric Review

Field Programmable Gate Array Implem Ri

We present an 8-bit field programmable gate arr (FPGA) implementation of 128-bit block and 128-bit k Advanced Encryption Standard (AES) Rijndael. The 8Rijndael encryption data path operates at 13.7MHz a consumes 226 clock cycles resulting in a throughput of 7.8 bits per second. The Rijndael decryption data path operates 8.8MHz and consumes 226 clock cycles resulting in throughput of 5 M bits pe...

Field Programmable Gate Array–based Implementation of an Improved Algorithm for Objects Distance Measurement (TECHNICAL NOTE)

In this work, the design of a low-cost, field programmable gate array (FPGA)-based digital hardware platform that implements image processing algorithms for real-time distance measurement is presented. Using embedded development kit (EDK) tools from Xilinx, the system is developed on a spartan3 / xc3s400, one of the common and low cost field programmable gate arrays from the Xilinx Spartan fami...

Field Programmable Gate Array Implementation of Active Control Laws for Multi-mode Vibration Damping

This paper investigate the possibility and effectiveness of multi-mode vibration control of a plate through real-time FPGA (Field Programmable Gate Array) implementation. This type of embedded system offers true parallel and high throughput computation abilities. The control object is an aluminum panel, clamped to a Perspex box’s upper side. Two types of control laws are studied. The first belo...

A Globally Asynchronous Locally Synchronous Field Programmable Gate Array Architecture

Globally Asynchronous Locally Synchronous techniques have been developed over recent years as they allow some of the advantages of asynchronous circuits to be integrated into synchronous designs. This has been applied to ASICs, but not FPGAs. We propose using these techniques to improve the routing of FPGAs targeted at synchronous designs.

A Shogi Processor with a Field Programmable Gate Array